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The simplest kind of electronics, known as analogue electronics, works with continuous signals – a smoothly rising and falling sound wave goes through an analogue circuit as a smoothly rising and falling voltage. Digital electronics works differently. Using SAMPLING, it converts signals into strings of numbers that can be processed mathematically by electronic circuits.

The wiggly grooves of a record mimic the shape of the original sound wave. The pick-up produces an electrical wave the same shape as the wiggles. Unfortunately, it copies faithfully everything it finds on the disc – so scratches come out as noisy clicks. The surface of a CD looks nothing like the original sound waves. Before sound is put on a CD, digital electronic circuits convert it into complicated on–off patterns, which are pressed into the plastic as a series of pits. The patterns allow the CD player to play just the music and leave out the scratches.

sampling

Before a signal can be handled by digital electronics, it has to be converted into digital form. In sampling, circuits called analogue-to-digital converters make thousands of measurements of the signal each second. The measurements are then converted into binary form, which is a way of writing numbers with just two digits – ideal for on–off electronic switches.
FROM WAVES TO NUMBERS
Digital sound starts with a electrical circuit that samples an analogue sound signal about 44,000 times each second. This rate of sampling is needed to capture the highest frequencies (speeds of vibration) in the original sound wave. The circuit stores the value of each sample for just 20 millionths of a second – the time it takes to convert it into binary form.

Number code

The numbers from the sampled sound wave are handled in binary code, which uses only two digits – 1 and 0. In electronics, the corresponding code is “on” and “off”. Samples in this form can be sent as pulses. On a CD, samples use a complex error-correcting code to make the CD more resistant to scratches.

SIGNAL PROCESSING

Sampling is not limited to sound. It is used to convert the picture in a camera phone into digital form. The picture is sliced into thousands of tiny square samples, called pixels. A small computer inside the phone works on the samples to produce a simplified picture, which can be sent to someone else more quickly than the original picture. Their phone changes the samples back into a picture again.

ELECTRONIC CALCULATOR

Pocket calculators would not be possible without digital electronics. They handle numbers as electrical signals that are either on or off. This is because they do their maths with transistors – electronic switches that, like other switches, can only turn on or off. Numbers in this form can easily be processed by the calculator’s LOGIC CIRCUITS to produce the right result.

LOGIC CIRCUITS

Computers function by breaking big problems down into thousands of smaller ones. They then solve these little problems one by one until the job is done. All the actual work is done by logic gates – circuits that obey the rules of logic. Each logic gate obeys a single, simple rule, such as saying that C is true only if A and B are true. With enough gates, computers can solve any problem that is strictly logical. Most of the millions of transistors at the heart of a computer are in logic gates.

LOGIC CHIP

The large, complex chips in digital circuits are often supported by smaller logic chips. Each of these devices contains only a few logic gates. The gates are made from transistors and resistors formed on the surface of silicon.

LOGIC GATES

Logic signals turn on (1) and off (0) to signal true and false. Gates have any number of inputs, but only one output. An inverter always has one input. Here are two examples of logic gates.

AND GATE

The output turns on only if all of the inputs are on. It turns off if any of them are off.

OR GATE

The output turns on if any of the inputs are on. It turns off only if all of them are off.

INVERTER

The output turns on only if the input is off. It turns off only if the input is on.


above information is related to DE. this book contains

1 NUMERATION SYSTEMS 1
1.1 Numbers and symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Systems of numeration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 Decimal versus binary numeration . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 Octal and hexadecimal numeration . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.5 Octal and hexadecimal to decimal conversion . . . . . . . . . . . . . . . . . . . . . 12
1.6 Conversion from decimal numeration . . . . . . . . . . . . . . . . . . . . . . . . . 13
2 BINARY ARITHMETIC 19
2.1 Numbers versus numeration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2 Binary addition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3 Negative binary numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4 Subtraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.5 Over ow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.6 Bit groupings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3 LOGIC GATES 29
3.1 Digital signals and gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2 The NOT gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3 The ”buffer” gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.4 Multiple-input gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.5 TTL NAND and AND gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.6 TTL NOR and OR gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.7 CMOS gate circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.8 Special-output gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
3.9 Gate universality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
3.10 Logic signal voltage levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
3.11 DIP gate packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
3.12 Contributors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4 SWITCHES 103
4.1 Switch types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.2 Switch contact design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
4.3 Contact ”normal” state and make/break sequence . . . . . . . . . . . . . . . . . . 111
iii
iv CONTENTS
4.4 Contact ”bounce” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5 ELECTROMECHANICAL RELAYS 119
5.1 Relay construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.2 Contactors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
5.3 Time-delay relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.4 Protective relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
5.5 Solid-state relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6 LADDER LOGIC 135
6.1 ”Ladder” diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.2 Digital logic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
6.3 Permissive and interlock circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
6.4 Motor control circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
6.5 Fail-safe design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
6.6 Programmable logic controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
6.7 Contributors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
7 BOOLEAN ALGEBRA 173
7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
7.2 Boolean arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3 Boolean algebraic identities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
7.4 Boolean algebraic properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
7.5 Boolean rules for simpli cation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
7.6 Circuit simpli cation examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
7.7 The Exclusive-OR function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
7.8 DeMorgan's Theorems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
7.9 Converting truth tables into Boolean expressions . . . . . . . . . . . . . . . . . . 200
8 KARNAUGH MAPPING 219
8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
8.2 Venn diagrams and sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
8.3 Boolean Relationships on Venn Diagrams . . . . . . . . . . . . . . . . . . . . . . . 223
8.4 Making a Venn diagram look like a Karnaugh map . . . . . . . . . . . . . . . . . 228
8.5 Karnaugh maps, truth tables, and Boolean expressions . . . . . . . . . . . . . . . 231
8.6 Logic simpli cation with Karnaugh maps . . . . . . . . . . . . . . . . . . . . . . . 238
8.7 Larger 4-variable Karnaugh maps . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
8.8 Minterm vs maxterm solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
8.9 § (sum) and ¦ (product) notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
8.10 Don't care cells in the Karnaugh map . . . . . . . . . . . . . . . . . . . . . . . . . 262
8.11 Larger 5 & 6-variable Karnaugh maps . . . . . . . . . . . . . . . . . . . . . . . . 265
9 COMBINATIONAL LOGIC FUNCTIONS 273
9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
9.2 A Half-Adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
9.3 A Full-Adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
CONTENTS v
9.4 Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
9.5 Encoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286
9.6 Demultiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
9.7 Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
9.8 Using multiple combinational circuits . . . . . . . . . . . . . . . . . . . . . . . . . 294
10 MULTIVIBRATORS 299
10.1 Digital logic with feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
10.2 The S-R latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
10.3 The gated S-R latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307
10.4 The D latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308
10.5 Edge-triggered latches: Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
10.6 The J-K ip- op . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
10.7 Asynchronous ip- op inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
10.8 Monostable multivibrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
11 COUNTERS 323
11.1 Binary count sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
11.2 Asynchronous counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
11.3 Synchronous counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
11.4 Counter modulus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
12 SHIFT REGISTERS 339
12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
12.2 Serial-in/serial-out shift register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
12.3 Parallel-in, serial-out shift register . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
12.4 Serial-in, parallel-out shift register . . . . . . . . . . . . . . . . . . . . . . . . . . 362
12.5 Parallel-in, parallel-out, universal shift register . . . . . . . . . . . . . . . . . . . 371
12.6 Ring counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 382
12.7 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
13 DIGITAL-ANALOG CONVERSION 397
13.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 397
13.2 The R/2nR DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399
13.3 The R/2R DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
13.4 Flash ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 404
13.5 Digital ramp ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407
13.6 Successive approximation ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
13.7 Tracking ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411
13.8 Slope (integrating) ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
13.9 Delta-Sigma (¢§) ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
13.10Practical considerations of ADC circuits . . . . . . . . . . . . . . . . . . . . . . . . 417
vi CONTENTS
14 DIGITAL COMMUNICATION 423
14.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
14.2 Networks and busses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
14.3 Data ow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
14.4 Electrical signal types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
14.5 Optical data communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436
14.6 Network topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
14.7 Network protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
14.8 Practical considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
15 DIGITAL STORAGE (MEMORY) 445
15.1 Why digital? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445
15.2 Digital memory terms and concepts . . . . . . . . . . . . . . . . . . . . . . . . . . 446
15.3 Modern nonmechanical memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 448
15.4 Historical, nonmechanical memory technologies . . . . . . . . . . . . . . . . . . . 450
15.5 Read-only memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456
15.6 Memory with moving parts: ”Drives” . . . . . . . . . . . . . . . . . . . . . . . . . 457
16 PRINCIPLES OF DIGITAL COMPUTING 461
16.1 A binary adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
16.2 Look-up tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462
16.3 Finite-state machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
16.4 Microprocessors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
16.5 Microprocessor programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474
A-1 ABOUT THIS BOOK 477
A-2 CONTRIBUTOR LIST 481
A-3 DESIGN SCIENCE LICENSE 485
INDEX 488

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